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STK501 ............................................................................. user guide

table of contents i table of contents section 1 introduction ........................................................................................... 1-1 1.1 features ....................................................................................................1-2 section 2 using the STK501 top module............................................................. 2-1 2.1 connecting the STK501 to the stk500 starter kit ...................................2-1 2.1.1 placing an atmega103(l) or atmega128(l) on the stk500............2-1 2.2 port connectors.....................................................................................2-2 2.2.1 port e/port f ................................................................................2-2 2.2.2 port g/aux .....................................................................................2-3 2.2.2.1 pg0 - pg4 ...................................................................................2-3 2.2.2.2 a16...............................................................................................2-3 2.2.2.3 sramen......................................................................................2-3 2.2.2.4 pen..............................................................................................2-3 2.3 programming the atmega103(l)/ 128(l) .................................................2-3 2.3.1 in-system programming.....................................................................2-3 2.3.2 high-voltage programming.................................................................2-4 2.4 jtag connector .......................................................................................2-5 2.5 external sram .........................................................................................2-6 2.5.1 a16 .....................................................................................................2-7 2.5.2 sramen ............................................................................................2-7 2.6 ram high address jumpers .....................................................................2-8 2.7 a[7:0] connector .......................................................................................2-8 2.8 using the sram interface with at90s/ls8515 and atmega161 ............2-8 2.9 tosc switch ............................................................................................2-9 2.10 rs-232c port............................................................................................2-9 section 3 troubleshooting guide ......................................................................... 3-1 section 4 technical specifications ....................................................................... 4-1 section 5 technical support................................................................................. 5-1
table of contents ii section 6 complete schematics........................................................................... 6-1
avr ? STK501 user guide 1-1 section 1 introduction the STK501 board is a top module designed to add atmega103(l) and atmega128(l) support to the stk500 development board from atmel corporation. with this board the stk500 is extended to support all current avr devices in a single development environment. the STK501 includes connectors, jumpers and hardware allowing full utilization of the new features of the atmega128(l) while the zero insertion force (zif) socket allows easy use of tqfp packages for prototyping. this user guide acts as a general getting started guide as well as a complete technical reference for advanced users. in addition to adding support for new devices, it also adds new support for peripherals previously not supported by the stk500. an additional rs-232 port and external sram interface are09/01 among the new features. devices with dual uart or xram interface can all take advantage of the new resources on the STK501 board. figure 1-1. STK501 top module for stk500 rev. 2491a-09/01
introduction 1-2 avr ? STK501 user guide 1.1 features stk500 compatible avr studio ? compatible supports atmega103(l) and atmega128(l) zero insertion force socket for tqfp packages tqfp footprint for emulator adapters supports all added features in atmega128(l) jtag connector for on-chip debugging using jtag ice (atmega128(l)) additional rs-232c port with available rts/cts handshake lines adds external sram support to the stk500 board (usable for all devices with xram interface) on-board 32 khz crystal for easy rtc implementations
avr ? STK501 user guide 2-1 section 2 using the STK501 top module 2.1 connecting the STK501 to the stk500 starter kit the STK501 should be connected to the stk500 expansion header 0 and 1. it is impor- tant that the top module is connected in the correct orientation as shown in figure 2-1. the expand0 written on the STK501 top module should match the expand0 written beside the expansion header on the stk500 board. figure 2-1. connecting STK501 to the stk500 board note: connecting the STK501 with wrong orientation may damage the board. 2.1.1 placing an atmega103(l) or atmega128(l) on the stk500 the STK501 contains both a zif socket, and the pinout for a tqfp package; which allows an easy way of soldering an emulator adapter directly into the STK501. care should be taken so that the device (or adapter) is mounted with the correct orientation. figure 2-2 shows the location of pin 1 for the zif socket and the tqfp footprint. caution: do not mount an atmega103(l) or atmega128(l) on the STK501 at the same time as an avr is mounted on the stk500 board. rev. 2491a-09/01
using the STK501 top module 2-2 avr ? STK501 user guide figure 2-2. pin1 on zif socket and tqfp footprint 2.2 port connectors since the atmega103(l) and atmega128(l) have additional ports not available on the stk500, these ports are located on the STK501 board. they have the same pinout and functionality as the ports on the stk500 board. port a to port d which are already present on the stk500 board are not duplicated on the STK501. 2.2.1 port e/port f figure 2-3 shows the pinout for the i/o port headers port e and port f. figure 2-3. general i/o ports note: port e is also present on the stk500, but only pe0 to pe2 (3 least significant bits) are accessible there. to access all port e bits the connector on the STK501 must be used. pe1 pe3 pe5 pe7 vtg pe0 pe2 pe4 pe6 gnd 1 2 port e pf1 pf3 pf5 pf7 vtg pf0 pf2 pf4 pf6 gnd 1 2 port f
using the STK501 top module avr ? STK501 user guide 2-3 2.2.2 port g/aux in addition to the normal port g pins, this connector has some extra signals. see figure 2-4. figure 2-4. portg/aux 2.2.2.1 pg0 - pg4 these are general i/o ports for the atmega128(l) and connect to the zif socket and the tqfp footprint. the pg3 and pg4 signals are routed through the tosc switch since these pins also are inputs for a 32 khz oscillator. for a description on the tosc switch see section 2.9. note: atmega103(l) does not have port g. 2.2.2.2 a16 this line goes to a16 (most significant address bit) on the sram. see section 2.5 for more information about this signal. can be connected to any avr pin. 2.2.2.3 sramen the sramen signal controls if the sram is enabled or not. to enable the sram a low level should be applied to this pin. see ? external sram ? , section 2.5, for more information on how to use this signal. this signal is pulled high by default. 2.2.2.4 pen the pen pin is connected to the pen pin on the atmega103(l)/128(l). this pin is described in the programming section of the atmega103(l) and atmega128(l) datasheets. 2.3 programming the atmega103(l)/ 128(l) the atmega103(l) and atmega128(l) can be programmed using both spi and high- voltage parallel programming. this sub section will explain how to connect the program- ming cables to successfully use one of these two modes. the avr studio stk500 software is used in the same way as for other avr parts. note: the atmega128(l) also supports self programming. see avr109 application note for more information on this topic. 2.3.1 in-system programming to program the atmega103(l) or atmega128(l) using isp programming mode, con- nect the 6-wire cable between the isp6pin connector on the stk500 board and the isp connector on the STK501 board as shown in figure 2-5. the device can be programmed using the serial programming mode in the avr studio stk500 software. note: see the stk500 user guide for information on how to use the stk500 front- end software for isp programming. pg1 pg3 a16 pen vtg pg0 pg2 pg4 sramen gnd 1 2 port g/aux
using the STK501 top module 2-4 avr ? STK501 user guide figure 2-5. in-system programming 2.3.2 high-voltage programming to program the atmega103(l) or atmega128(l) using high-voltage (parallel) pro- gramming, connect the progctrl to portd and progdata to portb on the stk500 as shown in figure 2-6. as described in the stk500 user guide, the bsfl2 jumper must be mounted when high-voltage programming atmega devices. this also applies to the high-voltage pro- gramming of atmega103(l) and atmega128(l). the device can now be programmed using the high-voltage programming mode in avr studio stk500 software. note: see the stk500 user guide for information on how to use the stk500 front- end software in high-voltage programming mode. note: for the high-voltage programming mode to function correctly, the target voltage must be higher than 4.5v. caution: make sure the sram (if mounted) can handle this voltage.
using the STK501 top module avr ? STK501 user guide 2-5 figure 2-6. high-voltage (parallel) programming 2.4 jtag connector the jtag connector is intended for the atmega128(l) that has a built-in jtag inter- face. the pinout of the jtag connector is shown in figure 2-7 and is compliant with the pinout of the jtag ice available from atmel. connecting a jtag ice to this connector allows on-chip debugging of the atmega128(l). more information about the jtag ice and on-chip debugging can be found in the avr jtag ice user guide, which is available at the atmel web site, www.atmel.com. figure 2-7. jtag connector figure 2-8 shows how to connect the jtag ice probe on the STK501 board. gnd vtg rst nc gnd tck tdo tms vtg tdi 1 2 jtag
using the STK501 top module 2-6 avr ? STK501 user guide figure 2-8. connecting jtag ice to the STK501 2.5 external sram the STK501 contains a footprint where an external sram device can be mounted. make sure the sram device has the same voltage range as the rest of the design. caution: special care should be taken if a low voltage sram is used, since high-volt- age programming requires a programming voltage higher than 4.5v. low-voltage sram may be damaged if high-voltage programming of the target avr is done. table 2-1 shows a list of recommended sram devices, and typical range of operation. it is important that the sram device is soldered with the correct orientation as shown in figure 2-9. note: the sram is disabled by default. to enable sram support, put a jumper between the sramen and gnd pin on the portg/aux connector. figure 2-9. pin1 on sram footprint and pinout a0 a1 a2 a3 cs d0 d1 vcc gnd d2 d3 we a4 a5 a6 a7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 a8 a9 a10 a11 a12 d4 d5 vcc gnd d6 d7 oe a13 a14 a15 a16 128kx8
using the STK501 top module avr ? STK501 user guide 2-7 2.5.1 a16 the a16 pin on the portg/aux connector is connected to a16 (address pin 16) on the sram. atmega103(l) and atmega128(l) support up to 60 kb of external sram. the STK501 sram footprint is for a 128 kb sram. implementing software control of the a16 line will increase the memory range from 64 kb to 128 kb. this line is pulled low by default, addressing the lower 64 kb of the sram. figure 2-10. sram block schematic 2.5.2 sramen the sramen pin on the portg/aux connector is connected to the chip-enable (ce) pin of the sram. this signal controls if the sram should be enabled or not. to enable the sram, a low level should be applied to this pin. this pin is pulled high by default, through a 10 k ? resistor. figure 2-10 shows a simplified block schematic on how the sram interface is implemented. figure 2-11 shows how to enable the sram by short- ing sramen and gnd on the portg/aux connector using one of the supplied jumpers. this signal can also be controlled by software or by some external control logic. table 2-1. recommended sram devices manufacturer part number supply voltage (v) package issi is63lv1024-t 3.3 tsop-ii issi is63lv1024-j 3.3 soj 300-mil issi is63lv1024-k 3.3 soj 400-mil idt idt71124-y 5.0 soj 400-mil idt idt71v124sa-ty 3.3 soj 300-mil idt idt71v124sa-y 3.3 soj 400-mil idt idt71v124sa-ph 3.3 tsop-ii vtg pa6 pa7 pa5 pa4 pa3 pa2 pa1 pa0 pa6 pa7 pa5 pa4 pa3 pa2 pa1 pa0 pc6 pc7 pc5 pc4 pc3 pc2 pc1 pc0 oe we ce sram a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 a10 a11 a12 a13 a14 a15 a16 d0 d1 d2 d3 d4 d5 d6 d7 10k x 12 latch le q0 q1 q2 q3 q4 q5 q6 q7 d1 d2 d3 d4 d5 d6 d7 d0 avr porta ale (pg2) wr (pg0) rd (pg1) portc oe a6 a7 a5 a4 a3 a2 a1 a0 vtg a[7:0] a6 a4 a2 a0 a7 a5 a3 a1 a6 a4 a2 a0 a7 a5 a3 a1 from portg/aux connector sramen a16 ram high address
using the STK501 top module 2-8 avr ? STK501 user guide figure 2-11. sramen connected to gnd 2.6 ram high address jumpers when external memory is enabled in an avr, all port c pins are by default used for the high address byte. if the full 60 kb address space is not required to access the external memory, some, or all, port c pins can be released for normal port pin function as described in the atmega128(l) datasheet. at90s/ls8515, atmega103(l) and atmega161 do not have this feature, and all jumpers should be connected if using the xram interface with these devices. if some or all of the port c pins are released for normal port pin functions, the corre- sponding ? ram high address ? jumper should be removed to avoid any port c activity to reach the sram address pins thus corrupting the address. if a jumper is removed, the corresponding address line will be pulled low giving a logic zero on that address bit on the sram. see the block schematic on figure 2-10. 2.7 a[7:0] connector the connector marked a[7:0] contains the 8 least-significant bits of the external sram address bus. the purpose of the connector is to provide easy access to the address bus. the 8 most significant bits can be found on the ? ram high addresses ? jumpers or the port c connector. the connector is placed after the latch as shown in figure 2-10. this connector is handy when using the sram interface to interface external devices. 2.8 using the sram interface with at90s/ls8515 and atmega161 when using the sram interface with devices placed in the stk500 board, some addi- tional straps are required. the reason is that the rd , wr, and ale signals are not on the same port pins for the at90s8515/atmega161(l) and atmega103(l)/ atmega128(l), so these signals must be routed manually using two of the 2-wire cables. table 2-2. signal routing required for at90s8515a and atmega161(l) connections stk500 STK501 description write signal wr pd6 pg0 connect pd6:stk500 to pg0:STK501 read signal rd pd7 pg1 connect pd7:stk500 to pg1:STK501 address latch enable ale pe1 pg2 connect pe1:stk500 to pg2:STK501
using the STK501 top module avr ? STK501 user guide 2-9 figure 2-12. enabling sram interface for devices in stk500 2.9 tosc switch on the atmega128(l) the tosc1 and tosc2 lines are shared with port g (pg4 and pg3). the tosc switch select if the 32 khz crystal, or the port g connector pins should be connected to the pins on the device. figure 2-13 shows a simplified block schematic on how this is implemented. note: port g is not available on the atmega103(l), the switch will thus only select if the 32 khz crystal should be connected or not. figure 2-13. tosc block schematic 2.10 rs-232c port the atmega128(l) has an additional uart compared to the atmega103(l). the rs- 232 port on the STK501 board has in addition to the rxd and txd lines support for rts and cts flow control. figure 2-14 shows a simplified block schematic on how this is implemented. note: the uart in atmega128(l) does not support hardware rts or cts control. if such functionality is needed, it must be implemented in software. pg4/tosc1 pg3/tosc2 32 khz to port g/aux connector pg3 pg4 tosc switch avr
using the STK501 top module 2-10 avr ? STK501 user guide figure 2-14. uart block schematic this uart can also be used from devices placed in the stk500 board. simply connect the appropriate port pins to rxd and txd on the STK501 board. note: if no software rts/cts flow control is implemented, a jumper shorting rts and cts will ensure correct communication with an external application that uses such flow control. rxd txd cts rts rs-232/logic level converter 8 7 3 2 4 6 5 rs232 spare2
avr ? STK501 user guide 3-1 section 3 troubleshooting guide table 3-1. troubleshooting guide problem reason solution sram does not work properly. the sram is not connected. verify all solderings, and make sure the pin1 on the sram matches the one on the footprint. make sure the sram pinout is correct. sramen is not mounted. make sure that the sramen is connected to gnd on the aux connector. xram interface is not enabled in the avr device. verify that the code actually enables the xram interface. some of the address high byte jumpers may be set incorrectly. connect some or all of address high byte jumpers. sram does not work when used by devices on the stk500 board. wr , rd and ale signals must be strapped using two 2-wire cables. use two 2-wire cables, and connect these signals to the appropriate pins. after doing a high-voltage programming of the avr, the sram does not work properly. the sram might be damaged due to the high- voltage needed to program the avr. make sure the sram handles 5v, if high-voltage programming mode should be used.
troubleshooting guide 3-2 avr ? STK501 user guide
avr ? STK501 user guide 4-1 section 4 technical specifications system unit physical dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 x 119 x 27 mm weight . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 0 g operating conditions voltage supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.7v - 5.5v connections serial connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9-pin d-sub female serial communications speed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250 kbps
technical specifications 4-2 avr ? STK501 user guide
avr ? STK501 user guide 5-1 section 5 technical support for technical support, please contact avr@atmel.com. when requesting technical sup- port, please include the following information: which target avr device is used (complete part number) target voltage and speed clock source and fuse setting of the avr programming method (isp or high-voltage) hardware revisions of the avr tools, found on the pcb version number of avr studio. this can be found in the avr studio help menu. pc operating system and version/build pc processor type and speed a detailed description of the problem
technical support 5-2 avr ? STK501 user guide
avr ? STK501 user guide 6-1 section 6 complete schematics on the following pages the complete schematics and assembly drawing of the STK501 revision b are shown.
complete schematics 6-2 avr ? STK501 user guide figure 6-1. schematics, 1 of 3 1 2 3 4 5 6 78 a b c d 8 7 6 5 4 3 2 1 d c b a a9903.3.1010.b 13 19-jun-2001 STK501 page of rev. b copyright atmel corporation 2001 pat[7..0] pct[7..0] pat[7..0] pct[7..0] pft[7..0] pft[7..0] pgt[4..0] pgt[4..0] areft xt1 xt2 pdt[7..0] pbt[7..0] pbt[7..0] pdt[7..0] pet0 pet1 pet2 pet3 pet4 pet5 pet6 pet7 reset pet[7..0] pet[7..0] pbt0 pbt1 pbt2 pbt3 pbt4 pbt5 pbt6 pbt7 vtg gnd pat0 pat1 pat2 pat3 pat4 pat5 pat6 pat7 pct0 pct1 pct2 pct3 pct4 pct5 pct6 pct7 vtg gnd pgt0 pgt1 pgt2 pdt0 pdt1 pdt2 pdt3 pdt4 pdt5 pdt6 pdt7 pft0 pft1 pft2 pft3 pft4 pft5 pft6 pft7 gnd avtg tosc1 tosc2 tosc1 tosc2 pat[7..0] pct[7..0] pat[7..0] pct[7..0] pft[7..0] pft[7..0] pgt[4..0] pgt[4..0] areft xt1 xt2 pdt[7..0] pbt[7..0] pbt[7..0] pdt[7..0] pet0 pet1 pet2 pet3 pet4 pet5 pet6 pet7 reset pet[7..0] pet[7..0] pbt0 pbt1 pbt2 pbt3 pbt4 pbt5 pbt6 pbt7 vtg gnd pat0 pat1 pat2 pat3 pat4 pat5 pat6 pat7 pct0 pct1 pct2 pct3 pct4 pct5 pct6 pct7 vtg gnd pgt0 pgt1 pgt2 pdt0 pdt1 pdt2 pdt3 pdt4 pdt5 pdt6 pdt7 pft0 pft1 pft2 pft3 pft4 pft5 pft6 pft7 gnd avtg tosc1 tosc2 tosc1 tosc2 zif socket tqfp footprint vtg avtg 1 2 c101 100n_16v_x7r 1 2 c102 100n_16v_x7r 1 2 c106 100n_16v_x7r 1 2 c105 100n_16v_x7r 2 1 l101 blm-21a102s gnd reset reset pd7/t2 32 pd6/t1 31 pd5 30 pd4/ic1 29 pd3/int3 28 pd2/int2 27 pd1/int1 26 pd0/int0 25 pen 1 pe0/pdi/rxd 2 pe1/pdo/txd 3 pe2/ac+ 4 pe3/ac- 5 pe4/int4 6 pe5/int5 7 pe6/int6 8 xtal1 24 xtal2 23 gnd 22 vcc 21 reset 20 pg4/tosc1 19 pg3/tosc2 18 pb7/oc2 17 pb6/oc1b 16 pb5/oc1a 15 pb4/oc0 14 pb3/miso 13 pb2/mosi 12 pb1/sck 11 pb0/ss 10 pe7/int7 9 wr/pg0 33 ad7/pa7 44 ale/pg2 43 a15/pc7 42 a14/pc6 41 a13/pc5 40 a12/pc4 39 a11/pc3 38 a10/pc2 37 a9/pc1 36 a8/pc0 35 rd/pg1 34 ad6/pa6 45 ad5/pa5 46 ad4/pa4 47 ad3/pa3 48 avcc 64 agnd 63 aref 62 adc0/pf0 61 adc1/pf1 60 adc2/pf2 59 adc3/pf3 58 adc4/pf4 57 adc6/pf6 56 adc6/pf6 55 adc7/pf7 54 gnd 53 vcc 52 ad0/pa0 51 ad1/pa1 50 ad2/pa2 49 u101 atmega128 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 st101 tqfp64 zif socket 1 2 c103 100n_16v_x7r 1 2 c104 100n_16v_x7r pen pen pen pen 1 2 c107 100n_16v_x7r 1 2 c108 100n_16v_x7r areft areft gnd gnd
complete schematics avr ? STK501 user guide 6-3 figure 6-2. schematics, 2 of 3 1 2 3 4 5 6 78 a b c d 8 7 6 5 4 3 2 1 d c b a a9903.3.1010.b 23 19-jun-2001 STK501 page of rev. b copyright atmel corporation 2001 gnd gnd gnd pat0 pat1 pat2 pat3 pat4 pat5 pat6 pat7 pct0 pct1 pct2 pct3 pct4 pct5 pct6 pct7 gnd vtg pet0 pet1 pet2 reset areft gnd gnd gnd gnd vtg vtg gnd pdt0 pdt1 pdt2 pdt3 pdt4 pdt5 pdt6 pdt7 pbt0 pbt1 pbt2 pbt3 pbt4 pbt5 pbt6 pbt7 xt2 xt1 xt1 xt2 reset areft pat[7..0] pct[7..0] pat[7..0] pct[7..0] pet[7..0] pet[7..0] pdt[7..0] pbt[7..0] pbt[7..0] pdt[7..0] miso 1 sck 3 reset 5 gnd 6 vcc 2 mosi 4 j206 isp_connector gnd vtg pet0 pet1 pbt1 vtg gnd pet0 pet1 pet2 pet3 pet4 pet5 pet6 pet7 pft[7..0] vtg gnd pft0 pft1 pft2 pft3 pft4 pft5 pft6 pft7 pft[7..0] pgt[4..0] vtg gnd pgt[4..0] pgt0 pgt1 pgt2 pgt3 pgt4 pft4 pft5 pft6 pft7 gnd vtg gnd vtg reset reset vtg gnd vtg gnd a[7..0] a16 portf porte jtag portg/aux latched address a[7..0] a0 a1 a2 a3 a4 a5 a6 a7 1 2 3 4 5 6 7 8 9 10 j204 1 2 3 4 5 6 7 8 9 10 j203 1 2 3 4 5 6 7 8 9 10 j205 1 2 3 4 5 6 7 8 9 10 j208 1 2 3 4 5 6 7 8 9 10 j207 a16 expand0 expand1 1 2 c201 100n_16v_x7r 1 2 c202 100n_16v_x7r 1 2 c203 100n_16v_x7r 1 2 c204 100n_16v_x7r gnd gnd vtg vtg sramen sramen js201 js202 port g special features pg0: nwr pg1: nrd pg2: ale pg3: tosc2 pg4: tosc1 pen pen 1 2 r201 10k vtg 1 2 r203 0r gnd 1 2 r202 0r gnd 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 j201 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 j202 not mounted
complete schematics 6-4 avr ? STK501 user guide figure 6-3. schematics, 3 of 3 1 2 3 4 5 6 78 a b c d 8 7 6 5 4 3 2 1 d c b a a9903.3.1010.b 33 19-jun-2001 STK501 page of rev. b copyright atmel corporation 2001 oe 1 le 11 d0 2 q0 19 d1 3 q1 18 d2 4 q2 17 d3 5 q3 16 d4 6 q4 15 d5 7 q5 14 d6 8 q6 13 d7 9 q7 12 vcc 20 gnd 10 u301 74ahc573pw a0 a1 a2 a3 a4 a5 a6 a7 pat[7..0] pct[7..0] pat[7..0] pct[7..0] pat0 pat1 pat2 pat3 pat4 pat5 pat6 pat7 a0 a1 a2 a3 a4 a5 a6 a7 pat0 pat1 pat2 pat3 pat4 pat5 pat6 pat7 pgt[4..0] pgt[4..0] pct0 pct1 pct2 pct3 pct4 pct5 pct6 pct7 a[7..0] a[7..0] gnd vtg gnd pgt0 pgt1 vtg pgt2 a16 pgt3 pgt4 tosc1 tosc2 tosc1 tosc2 pgt[4..0] pgt[4..0] 1 6 2 7 3 8 4 9 5 10 11 j301 kf22-e-9-s-n gnd gnd 1 2 c305 100n_16v_x7r 1 2 c303 100n_16v_x7r gnd gnd vtg 1 2 c304 100n_16v_x7r 1 2 c306 100n_16v_x7r vtg txd rxd rts cts js307 js305 js303 js301 js302 js304 js306 js308 a16 1 2 c301 100n_16v_x7r gnd vtg 1 2 c307 100n_16v_x7r gnd vtg 1 2 c302 100n_16v_x7r gnd vtg 32khz 1 2 r301 10k 1 2 r302 10k 1 2 r303 10k 1 2 r304 10k 1 2 r305 10k 1 2 r306 10k 1 2 r307 10k 1 2 r308 10k 1 2 r309 10k 1 2 r310 10k 1 2 3 4 xc301 rs232 spare2 1 2 3 4 j302 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 jp301 vtg gnd gnd a15 31 a14 30 a13 29 a12 21 a11 20 a10 19 a9 18 a8 17 a7 16 a6 15 a5 14 a4 13 a3 4 a2 3 a1 2 a0 1 a16 32 i/o0 6 i/o1 7 i/o2 10 i/o3 11 i/o4 22 i/o5 23 i/o6 26 i/o7 27 ce 5 we 12 oe 28 vcc 8 vcc 24 gnd 9 gnd 25 u302 128kx8 sram sramen sramen gnd 2 1 3 5 6 4 7 sw301 js309 t1 r1 t2 r2 v+ 2 14 13 7 8 v- 6 c1- 3 11 12 10 9 c2+ 4 c2- 5 c1+ 1 vcc 16 gnd 15 u303 max3232ecae 1 2 c308 10p_50v_np0 1 2 r311 33r gnd vtg vtg 1 2 r312 10k 1 2 r313 10k a8 a9 a10 a11 a12 a13 a14 a15 ram high address a16 tosc
complete schematics avr ? STK501 user guide 6-5 figure 6-4. assembly drawing, 1 of 1
complete schematics 6-6 avr ? STK501 user guide
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